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fix: remove invalid .connect directive in output_stage.cir — use shared node name GATE_Q1

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Alvaro Enrique Romero Donado
2026-05-22 23:27:21 -04:00
parent b82ed400bc
commit 78a58d1b53
1 changed files with 2 additions and 5 deletions
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tools/spice/2_output_stage.cir
+2 -5
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@@ -67,7 +67,7 @@ Rcathode CATHODE_LED GND 1 ; resistencia de retorno (cableado)
* Lado transistor (modelado como VCCS proporcional a corriente LED)
* Gcollector: corriente de colector = CTR * corriente LED
* CTR = 100% minimo garantizado a IF=5mA
Gcoll COLLECTOR EMITTER VALUE={MAX(0, 1.0 * I(Dled))}
Gcoll GATE_Q1 EMITTER VALUE={MAX(0, 1.0 * I(Dled))}
Remit EMITTER GND 0.1 ; Vce_sat ~ 0.1V a Ic<5mA
* -----------------------------------------------------------------------
@@ -75,12 +75,9 @@ Remit EMITTER GND 0.1 ; Vce_sat ~ 0.1V a Ic<5mA
* -----------------------------------------------------------------------
* Cuando PC817 OFF: Gate se carga a 3.3V via este resistor → MOSFET ON
* Cuando PC817 ON: Gate se descarga a GND via Gcoll → MOSFET OFF
Rpullup V33 COLLECTOR 10k
Rpullup V33 GATE_Q1 10k
Cgate GATE_Q1 GND 100p ; capacidad de gate del IRLML6344
* Nodo de gate (union de colector PC817 y gate MOSFET)
.connect COLLECTOR GATE_Q1
* -----------------------------------------------------------------------
* MOSFET IRLML6344TRPBF (N-channel, 20V, 5A, VGS(th)=0.5-1V)
* -----------------------------------------------------------------------